Invention Grant
- Patent Title: Integrated circuit package with vacant cavity
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Application No.: US13963948Application Date: 2013-08-09
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Publication No.: US09607863B1Publication Date: 2017-03-28
- Inventor: Myung June Lee
- Applicant: Altera Corporation
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L25/065 ; H01L25/00

Abstract:
Integrated circuit packages with cavity are disclosed. A disclosed integrated circuit package includes a first die. A second die may be coupled to the first die by attaching the first die to a top surface of the second die. A blocking element such as a barrier structure may be formed that surrounds the second die. A cavity may be formed between the blocking element and the first die that encloses the second die. The barrier structure may help prevent underfill material from entering the cavity during underfill deposition processes. A heat spreading lid may cover the first die, second die and package substrate.
Information query
IPC分类: