Invention Grant
- Patent Title: Silicon via with amorphous silicon layer and fabrication method thereof
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Application No.: US14722153Application Date: 2015-05-27
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Publication No.: US09607895B2Publication Date: 2017-03-28
- Inventor: Zuopeng He , Hongbo Zhao
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
- Applicant Address: CN Shanghai
- Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Current Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Current Assignee Address: CN Shanghai
- Agency: Anova Law Group, PLLC
- Priority: CN201410334110 20140714
- Main IPC: H01L21/30
- IPC: H01L21/30 ; H01L29/04 ; H01L21/768 ; H01L23/48 ; H01L21/02 ; H01L21/306

Abstract:
A method is provided for fabricating a semiconductor structure. The method includes providing a substrate having an upper surface and a bottom surface; and forming a deep hole in the substrate from the upper surface. The method also includes forming an amorphous silicon layer on a side surface and a bottom surface of the deep hole to promote a preferred crystal orientation in subsequently formed layers. Further, the method includes forming a barrier layer having a preferred orientation along the (111) crystal face on the barrier layer. Further, the method also includes forming a metal layer having a preferred orientation along the (111) crystal face on the barrier layer to fill the through hole.
Public/Granted literature
- US20160013135A1 SEMICONDUCTOR STRUCTURES AND FABRICATION METHOD THEREOF Public/Granted day:2016-01-14
Information query
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