Invention Grant
- Patent Title: Substrate with strained and relaxed silicon regions
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Application No.: US14819244Application Date: 2015-08-05
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Publication No.: US09608068B2Publication Date: 2017-03-28
- Inventor: Kangguo Cheng , Bruce B. Doris , Pouya Hashemi , Hong He , Alexander Reznicek
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Otterstedt, Ellenbogen & Kammer, LLP
- Agent Louis J. Percello, Esq.
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L21/762 ; H01L21/02

Abstract:
A method is provided for forming an integrated circuit. A trench is formed in a substrate. Subsequently, a silicon-germanium feature is formed in the trench, and an etch stop layer is formed on the substrate and on the silicon-germanium feature. Lastly, a silicon device layer is formed on the etch stop layer. The silicon device layer has a tensily-strained region overlying the silicon-germanium feature. Regions of the silicon device layer not overlying the silicon-germanium feature are less strained than the tensily-strained region. The tensily-strained region of the silicon device layer may be further processed into channel features in n-type field effect transistors with improved charge carrier mobilities and device drive currents.
Public/Granted literature
- US20170040417A1 SUBSTRATE WITH STRAINED AND RELAXED SILICON REGIONS Public/Granted day:2017-02-09
Information query
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