A digital-to-analog converter (DAC) is described. The DAC comprises a resistor having a resistance R and a capacitor having a capacitance C. The DAC comprises a first switching element configured, in response to a first control signal, to couple the capacitor to a first rail via a path having a resistance less than R and a second switching element configured, in response to a second control signal, to couple the capacitor to the first rail through the resistor. The DAC also comprises a third switching element configured, in response to a third control signal, to couple the capacitor to a second rail (8) via a path having a resistance less than R and a fourth switching element configured, in response to a responsive to a fourth control signal, to couple the capacitor to the second through the resistor. The capacitor can be quickly charged or discharged over a period less than RC or less than 0.7 RC. The DAC may comprise a first control element configured to switch on the second switching element before switching on the first switching element and a second control element configured to switch on the fourth switching element before switching on the third switching element.