Invention Grant
- Patent Title: Method for manufacturing electronic component
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Application No.: US15077188Application Date: 2016-03-22
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Publication No.: US09611142B2Publication Date: 2017-04-04
- Inventor: Yasuyuki Hirata , Gen Matsuoka
- Applicant: SUMITOMO PRECISION PRODUCTS CO., LTD.
- Applicant Address: JP Hyogo
- Assignee: Sumitomo Precision Products Co., Ltd.
- Current Assignee: Sumitomo Precision Products Co., Ltd.
- Current Assignee Address: JP Hyogo
- Agency: Renner, Otto, Boisselle & Sklar, LLP
- Priority: JP2013-231045 20131107
- Main IPC: H01L21/31
- IPC: H01L21/31 ; B81C1/00 ; G02B26/08 ; B81B3/00

Abstract:
At the first etching step of etching an SOI substrate from a first silicon layer side, a portion of a first structure formed of the first silicon layer is formed as a pre-structure having a larger shape than a final shape. At the mask formation step of forming a final mask on a second silicon layer side of the SOI substrate, a first mask corresponding to the final shape of the first structure is formed in the pre-structure. At the second etching step of etching the SOI substrate from the second silicon layer side, the second silicon layer and the pre-structure are, using the first mask, etched to form the final shape of the first structure.
Public/Granted literature
- US20160200569A1 METHOD FOR MANUFACTURING ELECTRONIC COMPONENT Public/Granted day:2016-07-14
Information query
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