Invention Grant
- Patent Title: High-speed flip-flop with robust scan-in path hold time
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Application No.: US14549063Application Date: 2014-11-20
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Publication No.: US09612281B2Publication Date: 2017-04-04
- Inventor: Yi Lou , Ardavan Moassessi , Paul Ivan Penzes , David Anthony Kidd
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Haynes and Boone, LLP
- Main IPC: H03K3/00
- IPC: H03K3/00 ; G01R31/3177 ; G01R31/317 ; G01R31/3185 ; H03K3/037 ; H03K3/3562
Abstract:
A flip-flop is provided that includes a master latch clocked according to a first delay during a normal mode of operation and clocked by a smaller second delay during a scan mode of operation.
Public/Granted literature
- US20160146887A1 HIGH-SPEED FLIP-FLOP WITH ROBUST SCAN-IN PATH HOLD TIME Public/Granted day:2016-05-26
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