Invention Grant
- Patent Title: Integrated circuit with selectable power-on reset mode
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Application No.: US14845114Application Date: 2015-09-03
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Publication No.: US09612653B2Publication Date: 2017-04-04
- Inventor: Wen Gu , Jing Cui , Shayan Zhang
- Applicant: FREESCALE SEMICONDUCTOR, INC.
- Applicant Address: US TX Austin
- Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee Address: US TX Austin
- Agent Charles E. Bergere
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F9/44 ; G06F1/24 ; G06F1/30

Abstract:
An integrated circuit (IC) and associated method support using a pre-use configuration for determining an initial/preferred operational mode for the IC from plural operational modes that may be entered following power-up cycles of the IC. The initial/preferred operational mode can be determined after the design phase of the IC so that, during IC operation, wasted power or delay are not incurred by first requiring that the IC power up in a default operational mode and subsequently run executive code to reprogram the IC to enter an operational mode that is preferred for the application for which the IC is being used by the IC integrator/user. The configurations determine clock frequencies and/or power levels for core processing and/or peripheral modules and allow the same IC design/die to be targeted to a spectrum of different power usage/performance applications by the integrator/user.
Public/Granted literature
- US20160231806A1 INITIAL OPERATIONAL MODE FOR INTEGRATED CIRCUIT Public/Granted day:2016-08-11
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