Data processor including prefix instruction selecting a flag out of a plurality of flags generated by a subsequent instruction operating on multiple operand sizes in parallel
Abstract:
Instructions for generating flags according to operands' data sizes, and instruction sets handled by a RISC data processor including an instruction capable of executing an operation on operands in more than one data size are disclosed. An identical operation process is conducted on the small-size operand and on low-order bits of the large-size operand, and flags are generated capable of coping with the respective data sizes regardless of the data size of each operand subjected to the operation. Thus, a reduction in instruction code space of the RISC data processor can be achieved.
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