Invention Grant
- Patent Title: Power efficient distribution and execution of tasks upon hardware fault with multiple processors
-
Application No.: US14542724Application Date: 2014-11-17
-
Publication No.: US09612907B2Publication Date: 2017-04-04
- Inventor: Chandan Hks , Sonika P Reddy
- Applicant: Chandan Hks , Sonika P Reddy
- Applicant Address: US PA Blue Bell
- Assignee: Unisys Corporation
- Current Assignee: Unisys Corporation
- Current Assignee Address: US PA Blue Bell
- Agent Robert P. Marley
- Main IPC: G06F11/14
- IPC: G06F11/14 ; G06F9/48

Abstract:
Tasks may be scheduled on more than one processor to allow the processors to operate at lower processor frequencies and processor supply voltages. Multiple processors executing tasks in parallel at lower frequencies and supply voltages may allow completion of the tasks by deadlines at lower power consumption than a single processor executing all tasks at high frequencies and supply voltages. Power efficiency of a computer system may be improved by using a combination of processors executing tasks using a combination of earliest deadline first (EDF), earliest deadline last (EDL), and round robin (RR) queue management methods.
Public/Granted literature
- US20150242275A1 POWER EFFICIENT DISTRIBUTION AND EXECUTION OF TASKS UPON HARDWARE FAULT WITH MULTIPLE PROCESSORS Public/Granted day:2015-08-27
Information query