Invention Grant
- Patent Title: Read disturb and data retention handling for NAND devices
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Application No.: US14668890Application Date: 2015-03-25
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Publication No.: US09612957B2Publication Date: 2017-04-04
- Inventor: Tatyana Brokhman , Konstantin Dorfman
- Applicant: Qualcomm Innovation Center, Inc.
- Applicant Address: US CA San Diego
- Assignee: Qualcomm Innovation Center, Inc.
- Current Assignee: Qualcomm Innovation Center, Inc.
- Current Assignee Address: US CA San Diego
- Agency: Neugeboren O'Dowd PC
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F3/06 ; G06F12/02

Abstract:
Systems, methods, and apparatus are herein disclosed for reducing read disturb and data retention errors in FLASH memory devices designed for long lifespans, such as greater than 10 or 15 years. Read disturb errors can be reduced by maintaining a read counter stored in a volatile memory and a FASTMAP memory block of the FLASH memory. When the read counter meets a threshold, then the associated memory block can be scheduled for scrubbing. Data retentions errors can be reduced by maintaining a last-erase timestamp in metadata of each memory block of a FLASH memory. When the last-erase timestamp associated with a given memory block meets a threshold, then the memory block can be scheduled for scrubbing.
Public/Granted literature
- US20160034194A1 READ DISTURB AND DATA RETENTION HANDLING FOR NAND DEVICES Public/Granted day:2016-02-04
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