Invention Grant
- Patent Title: Jittered coverage accumulation path rendering
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Application No.: US13109763Application Date: 2011-05-17
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Publication No.: US09613451B2Publication Date: 2017-04-04
- Inventor: Mark J. Kilgard
- Applicant: Mark J. Kilgard
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: G09G5/00
- IPC: G09G5/00 ; G06T15/00 ; G06T11/20

Abstract:
One embodiment of the present invention sets forth a technique for rendering anti-aliased paths by first generating an alpha buffer representing coverage data. To generate the alpha buffer, jittered versions of the rendered path are rendered and corresponding stencil buffers indicating sub-pixel samples of the path that should be covered are generated. After each stencil buffer is generated, the jittered path is rasterized to convert the sub-pixel coverage into coverage weights that are stored in the alpha component of a frame buffer. As each jittered path is rasterized, the coverage weights are accumulated. Finally, geometry representing the union of the jittered versions of the path is rendered to shade pixels based on the accumulated coverage weights. The anti-aliased rendered paths may be filled or stroked without tessellating the paths.
Public/Granted literature
- US20110285747A1 JITTERED COVERAGE ACCUMULATION PATH RENDERING Public/Granted day:2011-11-24
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