The present disclosure provides an array substrate, a display panel and a display device. The array substrate includes: a plurality of data lines and a plurality of gate lines configured to divide a display region into a plurality of display sub-regions; a pixel electrode arranged at each display sub-region; and a TFT arranged at each display sub-region, a source electrode of the TFT being electrically connected to the data line, a drain electrode thereof being electrically connected to the pixel electrode and a gate electrode thereof being electrically connected to the gate line, wherein a parasitic capacitor is formed between the gate electrode and the drain electrode of the TFT. The array substrate further includes a switch circuit configured to enable both ends of the parasitic capacitor to be electrically connected when a gate driving signal of the TFT is changed from a high level to a low level.