Invention Grant
- Patent Title: Array structure of single-ploy nonvolatile memory
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Application No.: US15257359Application Date: 2016-09-06
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Publication No.: US09613663B2Publication Date: 2017-04-04
- Inventor: Wei-Ren Chen , Wen-Hao Lee
- Applicant: eMemory Technology Inc.
- Applicant Address: TW Hsin-Chu
- Assignee: EMEMORY TECHNOLOGY INC.
- Current Assignee: EMEMORY TECHNOLOGY INC.
- Current Assignee Address: TW Hsin-Chu
- Agency: WPAT, PC
- Agent Justin King
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C5/06 ; G11C17/16 ; G11C17/18 ; H01L27/112 ; H01L29/423 ; H01L29/78 ; H01L27/11529 ; H01L27/11573 ; H01L29/51 ; H01L23/525 ; G11C16/10 ; G11C16/14 ; G11C16/26 ; H01L23/528 ; H01L27/11524 ; H01L29/49 ; H01L27/11558 ; H01L27/11526 ; H01L29/93 ; H01L29/06

Abstract:
An array structure of a single-poly nonvolatile memory includes a first MTP section, a first OTP section and a ROM section. The first MTP section includes a plurality of MTP cells, the first OTP section includes a plurality of OTP cells and the first ROM section includes a plurality of ROM cells. The first MTP is connected to a first word line, a first source line, a first erase line and a plurality of bit lines. The first OTP section is connected to a second word line, a second source line and the plurality of bit lines shared with the first MTP section. The first ROM section is connected to a third word line, a third source line and the plurality of bit lines shared with the first MTP section.
Public/Granted literature
- US20160379688A1 ARRAY STRUCTURE OF SINGLE-PLOY NONVOLATILE MEMORY Public/Granted day:2016-12-29
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