Invention Grant
- Patent Title: FinFET 6T SRAM cell structure
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Application No.: US14921963Application Date: 2015-10-23
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Publication No.: US09613682B2Publication Date: 2017-04-04
- Inventor: Gong Zhang , Nan Wang
- Applicant: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Applicant Address: CN Shanghai
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee Address: CN Shanghai
- Agency: Kilpatrick Townsend and Stockton LLP
- Priority: CN201410712009 20141201
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C11/412 ; H01L27/02 ; G11C11/418 ; H01L27/11 ; G11C11/419

Abstract:
A static memory circuit includes a pull-up transistor, a pull-down transistor, a pass-gate transistor associated with the pull-up and pull-down transistors, and first and second word lines electrically insulated from each other. The pass-gate transistor includes a number of Fins and a gate electrode having a number of first and second gates, each one of the gates is disposed on one of the Fins, the first gates are connected to the first word line, and the second gates are connected to the second word line. During a read operation, one of the first and second word lines is asserted low, so that the beta ratio is greater than or equal to a first predetermined value. During a write operation, one of the first and second word lines is asserted high; so that a gamma ratio is greater than or equal to a second predetermined value.
Public/Granted literature
- US20160155492A1 NOVEL FINFET 6T SRAM CELL STRUCTURE Public/Granted day:2016-06-02
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