Invention Grant
- Patent Title: Error correction circuit and semiconductor memory device including the same
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Application No.: US14855092Application Date: 2015-09-15
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Publication No.: US09613717B2Publication Date: 2017-04-04
- Inventor: Jae-Won Cha , Jae-Woo Park
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2015-0056599 20150422
- Main IPC: H03M13/00
- IPC: H03M13/00 ; G11C29/52 ; G06F11/10 ; G11C29/42 ; G11C29/44 ; G11C29/04
Abstract:
An error correction circuit includes: a failure detection unit suitable for detecting failed data among a plurality of data; a data output control unit suitable for selectively outputting test data corresponding to a predetermined amount of data excluding the failed data; and an error correction unit suitable for performing a unit ECC operation on the test data.
Public/Granted literature
- US20160314041A1 ERROR CORRECTION CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME Public/Granted day:2016-10-27
Information query
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