Invention Grant
- Patent Title: Method of manufacturing thin-film transistor
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Application No.: US14996323Application Date: 2016-01-15
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Publication No.: US09613860B2Publication Date: 2017-04-04
- Inventor: Isao Suzumura , Arichika Ishida , Hidekazu Miyake , Hiroto Miyake , Yohei Yamaguchi
- Applicant: Japan Display Inc.
- Applicant Address: JP Minato-ku
- Assignee: Japan Display Inc.
- Current Assignee: Japan Display Inc.
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2015-007527 20150119
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L29/66 ; H01L21/02 ; H01L29/417 ; H01L29/45 ; H01L29/786 ; H01L29/49 ; H01L21/78

Abstract:
According to one embodiment, a method of manufacturing a thin-film transistor includes forming a semiconductor layer on a gate electrode with an insulating layer 12 being interposed, forming interconnect formation layers on the semiconductor layer, forming a plurality of interconnects and electrodes by patterning the interconnect formation layers through etching, patterning the semiconductor layer in an island shape through etching after forming the electrodes, exposing a channel region of the semiconductor layer by etching a part of the electrodes on the semiconductor layer, and forming a protective layer so as to overlap the interconnects, the electrodes and the semiconductor layer having the island shape.
Public/Granted literature
- US20160211177A1 METHOD OF MANUFACTURING THIN-FILM TRANSISTOR Public/Granted day:2016-07-21
Information query
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