Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US14638443Application Date: 2015-03-04
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Publication No.: US09613872B2Publication Date: 2017-04-04
- Inventor: Satoshi Wakatsuki , Masayuki Kitamura , Atsuko Sakata , Kyoichi Suguro
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabrow, Garrett & Dunner LLP
- Priority: JP2014-198373 20140929
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/8238 ; H01L21/288 ; H01L21/285 ; H01L29/45 ; H01L21/768 ; H01L29/167
Abstract:
A method of manufacturing a semiconductor device includes forming a first metal containing a first conductivity-type impurity above a substrate provided with a first conductivity-type impurity region containing the first conductivity-type impurity and a second conductivity-type impurity region containing a second conductivity-type impurity; and forming a metal silicide containing the first metal by selectively causing, by thermal treatment, a reaction between the first metal and silicon contained in the substrate in the first conductivity-type impurity region.
Public/Granted literature
- US20160093538A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2016-03-31
Information query
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