Invention Grant
- Patent Title: Semiconductor structure and fabrication method thereof
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Application No.: US14958047Application Date: 2015-12-03
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Publication No.: US09613880B2Publication Date: 2017-04-04
- Inventor: Chenglong Zhang , Haiyang Zhang
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
- Applicant Address: CN Shanghai
- Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Current Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Current Assignee Address: CN Shanghai
- Agency: Anova Law Group, PLLC
- Priority: CN201410736226 20141204
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/31 ; H01L23/522 ; H01L21/768 ; H01L21/311 ; H01L21/027 ; H01L23/532 ; H01L23/29

Abstract:
A method for fabricating a semiconductor structure includes: providing a substrate with a dielectric layer and a passivation layer formed on the substrate; forming a via through the dielectric layer and exposing the substrate; forming a first conductive layer to fill the via with a top surface of the first conductive layer leveled with a top surface of the passivation layer; forming a patterned layer with an opening on the passivation layer. The opening is located above the first conductive layer with a dimension larger than the dimension of the via. The method also includes forming a trench in the dielectric layer; forming a second conductive layer to fill the trench and to electrically connect to the first conductive layer; then removing a portion of the second conductive layer, the patterned layer, and the passivation layer to make a top surface of the second conductive layer level with a top surface of the dielectric layer.
Public/Granted literature
- US20160163636A1 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF Public/Granted day:2016-06-09
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