Invention Grant
- Patent Title: Memory arrays
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Application No.: US14803303Application Date: 2015-07-20
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Publication No.: US09614007B2Publication Date: 2017-04-04
- Inventor: Mattia Boniardi , Andrea Redaelli
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/24
- IPC: H01L27/24 ; H01L45/00

Abstract:
Some embodiments include a memory array having a first memory cell adjacent to a second memory cell along a lateral direction. The second memory cell is vertically offset relative to the first memory cell. Some embodiments include a memory array having a series of data/sense lines extending along a first direction, a series of access lines extending along a second direction, and memory cells vertically between the access lines and data/sense lines. The memory cells are arranged in a grid having columns along the first direction and rows along the second direction. Memory cells in a common column and/or row as one another are arranged in two alternating sets, with a first set having memory cells at a first height and a second set having memory cells at a second height vertically offset relative to the first height. Some embodiments include methods of forming memory arrays.
Public/Granted literature
- US20170025477A1 Memory Arrays and Methods of Forming Memory Arrays Public/Granted day:2017-01-26
Information query
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