Invention Grant
- Patent Title: Split gate flash memory structure and method of making the split gate flash memory structure
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Application No.: US14306726Application Date: 2014-06-17
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Publication No.: US09614048B2Publication Date: 2017-04-04
- Inventor: Chang-Ming Wu , Shih-Chang Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/788 ; H01L29/66 ; H01L21/28 ; H01L29/417 ; H01L27/11524

Abstract:
A semiconductor structure of a split gate flash memory cell is provided. The semiconductor structure includes a semiconductor substrate including a source region and a drain region. Further, the semiconductor structure includes a floating gate, a word line, and an erase gate located over the semiconductor substrate between the source and drain regions. The floating gate is arranged between the word line and the erase gate. Even more, the semiconductor structure includes a dielectric disposed between the erase and floating gates. A thickness of the dielectric between the erase and floating gates is variable and increases towards the semiconductor substrate. A method of manufacturing the semiconductor structure is also provided.
Public/Granted literature
- US20150364558A1 SPLIT GATE FLASH MEMORY STRUCTURE AND METHOD OF MAKING THE SPLIT GATE FLASH MEMORY STRUCTURE Public/Granted day:2015-12-17
Information query
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