Invention Grant
- Patent Title: Al-poor barrier for InGaAs semiconductor structure
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Application No.: US15208783Application Date: 2016-07-13
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Publication No.: US09614082B2Publication Date: 2017-04-04
- Inventor: Bernardette Kunert , Robert Langer
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Agency: McDonnell Boehnen Hulbert & Berghoff LLP
- Priority: EP15181280 20150817
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L21/00 ; H01L29/78 ; H01L29/04 ; H01L29/205 ; H01L29/423 ; H01L29/06

Abstract:
The present disclosure relates to a semiconductor structure and a method of preparation including a silicon monocrystalline substrate, and a III-V structure abutting the silicon monocrystalline substrate. The semiconductor structure includes an InaGabAs structure overlaying the III-V structure, where a is from 0.40 to 1, b from 0 to 0.60, and a+b equal to 1.00. The III-V structure has a top surface facing away from the silicon substrate. The top surface is GagXxPpSbsZz, where X includes one or more group III elements other than Ga and Z is one or more group V elements other than P or Sb. g is from 0.80 to 1.00, x is from 0 to 0.20, z is from 0 to 0.30, p is from 0.10 to 0.55, and s is from 0.50 to 0.80, g+x is equal to 1.00 and p+s+z is equal to 1.00.
Public/Granted literature
- US20170054021A1 Al-poor barrier for InGaAs semiconductor structure Public/Granted day:2017-02-23
Information query
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