A detection circuit for a relative error voltage, including: a first current mirror, a second current mirror, a third current mirror, a current sink and resistors R1, R2 and R3. A voltage signal to be detected V1 accesses the first current mirror via the resistor R2, and a voltage signal to be detected V2 accesses the second current mirror via the resistor R3; a mirrored-end of the first current mirror is connected to the current sink, and a mirroring-end thereof is connected to a mirrored-end of the third current mirror; a mirrored-end of the second current mirror is connected to the current sink, and a mirroring-end thereof is connected to a mirroring-end of the third current mirror; the current sink is grounded via the resistor R1; and the third current mirror converts double-ended currents of the first and the second current mirrors to single-ended currents to output as voltage signals.