Invention Grant
- Patent Title: Methods and systems for implementing redundancy in memory controllers
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Application No.: US14564798Application Date: 2014-12-09
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Publication No.: US09619326B2Publication Date: 2017-04-11
- Inventor: Ashish Singhai , Ashwin Narasimha , Kenneth Alan Okin
- Applicant: HGST Netherlands B.V.
- Applicant Address: US CA Irvine
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA Irvine
- Agency: McDermott Will & Emery LLP
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/00

Abstract:
The present disclosure relates to methods and systems for implementing redundancy in memory controllers. The disclosed systems and methods utilize a row of memory blocks, such that each memory block in the row is associated with an independent media unit. Failures of the media units are not correlated, and therefore, a failure in one unit does not affect the data stored in the other units. Parity information associated with the data stored in the memory blocks is stored in a separate memory block. If the data in a single memory block has been corrupted, the data stored in the remaining memory blocks and the parity information is used to retrieve the corrupted data.
Public/Granted literature
- US20160162356A1 METHODS AND SYSTEMS FOR IMPLEMENTING REDUNDANCY IN MEMORY CONTROLLERS Public/Granted day:2016-06-09
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