Invention Grant
- Patent Title: Large-page optimization in virtual memory paging systems
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Application No.: US13529473Application Date: 2012-06-21
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Publication No.: US09619399B2Publication Date: 2017-04-11
- Inventor: Ole Agesen
- Applicant: Ole Agesen
- Applicant Address: US CA Palo Alto
- Assignee: VMware, Inc.
- Current Assignee: VMware, Inc.
- Current Assignee Address: US CA Palo Alto
- Agency: Patterson & Sheridan LLP
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F12/1009

Abstract:
A computer system that is programmed with virtual memory accesses to physical memory employs multi-bit counters associated with its page table entries. When a page walker visits a page table entry, the multi-bit counter associated with that page table entry is incremented by one. The computer operating system uses the counts in the multi-bit counters of different page table entries to determine where large pages can be deployed effectively. In a virtualized computer system having a nested paging system, multi-bit counters associated with both its primary page table entries and its nested page table entries are used. These multi-bit counters are incremented during nested page walks. Subsequently, the guest operating systems and the virtual machine monitors use the counts in the appropriate multi-bit counters to determine where large pages can be deployed effectively.
Public/Granted literature
- US20120265963A1 LARGE-PAGE OPTIMIZATION IN VIRTUAL MEMORY PAGING SYSTEMS Public/Granted day:2012-10-18
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