- Patent Title: Semiconductor apparatus, processor system, and control method for deallocating and allocating an address range corresponding to a memory between different processors of the processor system
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Application No.: US14593091Application Date: 2015-01-09
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Publication No.: US09619407B2Publication Date: 2017-04-11
- Inventor: Tetsuji Tsuda , Yoshiyuki Ito
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2014-021127 20140206
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/16 ; G06F12/10

Abstract:
A processor system (10) includes: a first memory controller (16) that controls writing/reading data to/from a first memory (60); a second memory controller (17) that controls writing/reading data to/from a second memory (70); a first processor (13) that inputs and outputs the data from and to the first memory through a bus (14); a second processor (11) that inputs and outputs processed data from and to the second memory through the bus; and a management unit 32 that deallocates an address range corresponding to the second memory from the first process and allocates the address range to the second processor.
Public/Granted literature
- US20150220282A1 SEMICONDUCTOR APPARATUS, PROCESSOR SYSTEM, AND CONTROL METHOD THEREOF Public/Granted day:2015-08-06
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