Invention Grant
- Patent Title: Reception circuit, method for adjusting timing in reception circuit, and semiconductor device
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Application No.: US15161006Application Date: 2016-05-20
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Publication No.: US09620196B2Publication Date: 2017-04-11
- Inventor: Hiroyuki Kano , Takanori Aoshima , Hiroaki Ukai , Kazumi Kojima
- Applicant: SOCIONEXT INC.
- Applicant Address: JP Yokohama
- Assignee: SOCIONEXT INC.
- Current Assignee: SOCIONEXT INC.
- Current Assignee Address: JP Yokohama
- Agency: Arent Fox LLP
- Priority: JP2015-108644 20150528
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C11/4076 ; G11C11/4096 ; G11C11/4093

Abstract:
A reception circuit includes a control signal generation circuit that generates a first enable signal based on a strobe signal and a second enable signal based on a core clock signal and a pointer control signal. A pattern data generation circuit generates determination pattern data from the first enable signal. An asynchronous transfer circuit latches the determination pattern data based on the first enable signal and the strobe signal and outputs determination data corresponding to the latched determination pattern data based on the second enable signal and the core clock signal. A determination circuit determines a timing for generating the pointer control signal based on the determination data. A set value calculation circuit calculates a transfer set value based on the determination result of the determination circuit. The control signal generation circuit updates the pointer control signal based on the transfer set value.
Public/Granted literature
- US20160351245A1 RECEPTION CIRCUIT, METHOD FOR ADJUSTING TIMING IN RECEPTION CIRCUIT, AND SEMICONDUCTOR DEVICE Public/Granted day:2016-12-01
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