Invention Grant
- Patent Title: Operating method of memory system
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Application No.: US14712656Application Date: 2015-05-14
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Publication No.: US09620246B2Publication Date: 2017-04-11
- Inventor: Hyung-Min Lee
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2014-0183456 20141218
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/52 ; G11C29/02 ; G06F11/10

Abstract:
Second data is generated by re-reading first data using a second read voltage when a first ECC decoding to first data using a first read voltage fails. Third data is generated by performing a second ECC decoding to the second data. An error-bit-number, which is a number of bits different between the second data and the third data, is obtained when the second ECC decoding fails. The process is repeated by changing the second read voltage until the error-bit-number is smaller than a predetermined threshold value. A third ECC decoding is performed to an optimal data that is the second data read using the second read voltage, with which the error-bit-number is smaller than the predetermined threshold value.
Public/Granted literature
- US20160179615A1 OPERATING METHOD OF MEMORY SYSTEM Public/Granted day:2016-06-23
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