Invention Grant
- Patent Title: Semiconductor device
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Application No.: US15059948Application Date: 2016-03-03
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Publication No.: US09620447B2Publication Date: 2017-04-11
- Inventor: Shuuichi Kariyazaki , Ryuichi Oikawa
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Koutou-ku, Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Koutou-ku, Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2014-012155 20140127
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H05K1/02 ; H01L23/522 ; H01L23/00

Abstract:
To improve noise immunity of a semiconductor device. A wiring substrate of a semiconductor device includes a first wiring layer where a wire is formed to which signals are sent, and a second wiring layer that is mounted adjacent to the upper layer or the lower layer of the first wiring layer. The second wiring layer includes a conductor plane where an aperture section is formed at a position overlapped with a portion of the wire 23 in the thickness direction, and a conductor pattern that is mounted within the aperture section of the conductor plane. The conductor pattern includes a main pattern section (mesh pattern section) that is isolated from the conductor plane, and plural coupling sections that couple the main pattern section and the conductor plane.
Public/Granted literature
- US20160190049A1 SEMICONDUCTOR DEVICE Public/Granted day:2016-06-30
Information query
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