Invention Grant
- Patent Title: Semiconductor device
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Application No.: US14991877Application Date: 2016-01-08
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Publication No.: US09620595B2Publication Date: 2017-04-11
- Inventor: Takayuki Shimatou
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-shi
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-shi
- Agency: Rabin & Berdo, P.C.
- Priority: JP2014-005880 20140116
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/10 ; H01L29/78 ; H01L29/08 ; H01L29/423

Abstract:
A gate pad electrode and a source electrode are disposed, separately from one another, on the front surface of a super junction semiconductor substrate. A MOS gate structure formed of n source regions, p channel regions, p contact regions, a gate oxide film, and polysilicon gate electrodes is formed immediately below the source electrode. The p well regions are formed immediately below the gate pad electrode. The p channel regions are linked to the p well regions via extension portions. By making the width of the p well regions wider than the width of the p channel regions, it is possible to reduce a voltage drop caused by a reverse recovery current generated in a reverse recovery process of a body diode. Breakdown of a portion of a gate insulating film immediately below the center of the gate pad electrode and breakdown of the semiconductor device are thus prevented
Public/Granted literature
- US20160126314A1 SEMICONDUCTOR DEVICE Public/Granted day:2016-05-05
Information query
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