Invention Grant
- Patent Title: Nonvolatile semiconductor memory element, nonvolatile semiconductor memory, and method for operating nonvolatile semiconductor memory element
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Application No.: US14971743Application Date: 2015-12-16
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Publication No.: US09620653B2Publication Date: 2017-04-11
- Inventor: Masao Shingu , Jun Fujiki , Naoki Yasuda , Koichi Muraoka
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Minato-ku
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-206291 20080808
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L29/788 ; H01L21/28 ; H01L29/792 ; G11C11/40 ; G11C16/04 ; G11C16/12 ; G11C16/14 ; G11C16/26 ; H01L27/11556 ; H01L27/11582 ; H01L29/423 ; H01L29/49 ; G11C16/10 ; H01L27/11521
Abstract:
According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film.
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