Invention Grant
- Patent Title: Single-thread cache miss rate estimation
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Application No.: US14918780Application Date: 2015-10-21
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Publication No.: US09626293B2Publication Date: 2017-04-18
- Inventor: James J. Bonanno , Alper Buyuktosunoglu , Brian W. Curran , Willm Hinrichs , Christian Jacobi , Brian R. Prasky , Martin Recktenwald , Anthony Saporito , Vijayalakshmi Srinivasan , John-David Wellman
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Laura E. Gisler
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/12 ; G06F12/0831 ; G06F12/0817 ; G06F12/084 ; G06F12/128

Abstract:
Cache miss rates for threads operating in a simultaneous multi-threading computer processing environment can be estimated. The single thread rates can be estimated by monitoring a shared directory for cache misses for a first thread. Memory access requests can be routed to metering cache directories associated with the particular thread. Single thread misses to the shared directory and single thread misses to the associated metering cache directory are monitored and a performance indication is determined by comparing the cache misses with the thread misses. The directory in the associated metering cache is rotated, and a second sharing performance indication is determined.
Public/Granted literature
- US20160246716A1 SINGLE-THREAD CACHE MISS RATE ESTIMATION Public/Granted day:2016-08-25
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