- Patent Title: Programming two-terminal memory cells with reduced program current
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Application No.: US13954853Application Date: 2013-07-30
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Publication No.: US09627057B2Publication Date: 2017-04-18
- Inventor: Hagop Nazarian , Sang Nguyen
- Applicant: Crossbar, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: CROSSBAR, INC.
- Current Assignee: CROSSBAR, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Amin, Turocy & Watson, LLP
- Main IPC: G11C13/00
- IPC: G11C13/00

Abstract:
Providing for programming a two-terminal memory cell array with low sneak path current is described herein. Groups of two-terminal memory cells can be arranged into blocks or sub-blocks, along sets of bitlines and local wordlines. Further, groups of local wordlines within a given sub-block can be electrically isolated from bitlines outside the sub-block. A programming signal can be applied to the two-terminal memory cells from an associated local wordline thereof. Sneak path currents can be mitigated or avoided with respect to bitlines outside a particular sub-block, or on non-selected wordlines of the sub-block. This can significantly reduce a magnitude of combined sneak path current within the sub-block in response to the programming operation.
Public/Granted literature
- US20140268997A1 PROGRAMMING TWO-TERMINAL MEMORY CELLS WITH REDUCED PROGRAM CURRENT Public/Granted day:2014-09-18
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