Invention Grant
- Patent Title: Method of making multi-layer electronic components with plated terminations
-
Application No.: US10951972Application Date: 2004-09-28
-
Publication No.: US09627132B2Publication Date: 2017-04-18
- Inventor: Andrew P. Ritter , Robert Heistand, II , John L. Galvagni , Sriram Dattaguru
- Applicant: Andrew P. Ritter , Robert Heistand, II , John L. Galvagni , Sriram Dattaguru
- Applicant Address: US SC Myrtle Beach
- Assignee: AVX Corporation
- Current Assignee: AVX Corporation
- Current Assignee Address: US SC Myrtle Beach
- Agency: Dority & Manning, P.A.
- Main IPC: H01G4/008
- IPC: H01G4/008 ; H01C1/14 ; H01C7/00 ; H01C7/10 ; H01G4/005 ; H01G4/012 ; H01G4/228 ; H01G4/232 ; H01G4/30 ; C25D5/02 ; H05K3/02 ; C23C18/16 ; C23C18/32 ; C23C18/38 ; C23C18/48 ; C23C28/02 ; C25D7/00 ; H01G4/12 ; H05K3/40

Abstract:
Improved method steps for making a multilayer electronic components are disclosed. Monolithic components are formed with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. Electrodes and insulating substrates are provided in an interleaved arrangement and selected portions of the electrodes are exposed along selected edges of the substrates. Anchor tabs, which are not in direct contact with the electrodes and offer additional nucleation points for plated structures, may also optionally be provided and exposed in some embodiments. Termination material is then plated to the exposed portions of the electrodes and optional anchor tabs, such as via electroless and/or electrochemical processes, until exposed portions of selected groups thereof are connected.
Public/Granted literature
- US09666366B2 Method of making multi-layer electronic components with plated terminations Public/Granted day:2017-05-30
Information query