Invention Grant
- Patent Title: Method for fabricating nitride semiconductor device with silicon layer
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Application No.: US14989249Application Date: 2016-01-06
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Publication No.: US09627222B2Publication Date: 2017-04-18
- Inventor: Takeshi Araya , Tsutomu Komatani
- Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD. , SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
- Applicant Address: JP Osaka JP Yokohama-shi
- Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.,SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
- Current Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.,SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
- Current Assignee Address: JP Osaka JP Yokohama-shi
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2010-166321 20100723
- Main IPC: H01L21/338
- IPC: H01L21/338 ; H01L21/322 ; H01L29/20 ; H01L29/66 ; H01L29/778 ; H01L21/324

Abstract:
A method for fabricating a semiconductor device including: forming a silicon layer on an upper face of a nitride semiconductor layer including a channel layer of a FET; thermally treating the nitride semiconductor layer in the process of forming the silicon layer or after the process of forming the silicon layer; and forming an insulating layer on an upper face of the silicon layer after the process of forming the silicon layer.
Public/Granted literature
- US20160118267A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Public/Granted day:2016-04-28
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