Invention Grant
- Patent Title: Interposer with edge reinforcement and method for manufacturing same
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Application No.: US14175920Application Date: 2014-02-07
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Publication No.: US09627329B1Publication Date: 2017-04-18
- Inventor: Woon-Seong Kwon , Suresh Ramalingam
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent Robert M. Brush
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/00 ; H01L23/31
Abstract:
A TSV interposer having a reinforced edge and methods for fabricating an IC package utilizing the same are provided. In one embodiment, a chip package includes an interposer having a wiring layer and a die disposed on a surface of the interposer. The die is electrically connected to the wiring layer of the interposer. A die underfill material is disposed between the interposer and the die. The die underfill material at least partially covers a side of the die that extends away from the surface of the interposer. Stiffening material is disposed in contact with the interposer and the die underfill material.
Information query
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