- Patent Title: Three-dimensional transistor and methods of manufacturing thereof
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Application No.: US14732224Application Date: 2015-06-05
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Publication No.: US09627411B2Publication Date: 2017-04-18
- Inventor: Jhih-Yang Yan , Samuel C. Pan , Chee Wee Liu , Hung-Yu Yeh , Da-Zhi Zhang
- Applicant: National Taiwan University , Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu TW Taipei
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.,National Taiwan University
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.,National Taiwan University
- Current Assignee Address: TW Hsin-Chu TW Taipei
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/12 ; H01L21/8234 ; H01L29/66 ; H01L27/088 ; H01L21/84 ; H01L29/08 ; H01L21/265

Abstract:
Three-dimensional (3D) transistors and methods of manufacturing thereof include a first semiconductor fin extending over a substrate. The first semiconductor fin has a vertical recess extending from a first sidewall of the first semiconductor fin toward a second sidewall of the first semiconductor fin opposite the first sidewall. A distance between two opposing sidewalls of the vertical recess decreases as the vertical recess extends toward the second sidewall of the first semiconductor fin. The device further includes a vertically recessed channel region between the second sidewall of the first semiconductor fin and a bottom of the vertical recess, source/drain (S/D) regions at opposite ends of the vertically recessed channel region, and a gate stack over the vertically recessed channel region.
Public/Granted literature
- US20160358940A1 Three-Dimensional Transistor and Methods of Manufacturing Thereof Public/Granted day:2016-12-08
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