Invention Grant
- Patent Title: Reconfigurable logic device
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Application No.: US15046777Application Date: 2016-03-08
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Publication No.: US09628084B2Publication Date: 2017-04-18
- Inventor: Masayuki Satou , Isao Shimizu
- Applicant: Taiyo Yuden Co., Ltd.
- Agency: Chip Law Group
- Priority: JP2015-029218 20150218
- Main IPC: H03K19/177
- IPC: H03K19/177 ; G06F7/38

Abstract:
A reconfigurable logic device includes logic units and allows logic circuits to be formed according to configuration data. The logic units each include a configuration memory that stores first and second configuration data, a first address input line through which a clock is inputted as a first address for the configuration memory, a second address input line through which an input of a data input line is inputted as a second address for the configuration memory, a register unit that, according to the clock, reads the second configuration data specified by the first address from the configuration memory and retains the second configuration data, and outputs the first configuration data in a previous state, and a multiplexer that, according to the first or second configuration data outputted from the register unit, selectively combines a data input from the data input line and a data output to a data output line.
Public/Granted literature
- US20160241245A1 RECONFIGURABLE LOGIC DEVICE Public/Granted day:2016-08-18
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