Invention Grant
- Patent Title: Spur reduction in phase locked loops using reference clock dithering
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Application No.: US15213574Application Date: 2016-07-19
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Publication No.: US09628262B1Publication Date: 2017-04-18
- Inventor: Marius Moe
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Ronald O. Neerings; Charles A. Brill; Frank D. Cimino
- Main IPC: H03D3/24
- IPC: H03D3/24 ; H04L7/033 ; H04B15/02 ; H04L7/06

Abstract:
An embodiment of the present disclosure provides a phase locked loop. A controllable oscillator generates a radio frequency (RF) signal. A divider is configured to produce a divided RF signal by dividing the RF signal by a division factor. A phase detection circuit is configured to receive a dithered reference signal and the divided RF signal and to produce a phase error signal for controlling the oscillator. A dithering module is configured produce the dithered reference signal and the division factor, in which the dithered reference signal has a randomly changing frequency selected from a plurality of dither frequencies, and in which the division factor is synchronously selected to match a ratio between each selected dither frequency and a target frequency of the RF signal.
Information query
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