Invention Grant
- Patent Title: Nonvolatile memory devices having single-layered floating gates
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Application No.: US15069282Application Date: 2016-03-14
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Publication No.: US09634102B2Publication Date: 2017-04-25
- Inventor: Tae Ho Lee
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2014-0033655 20140321
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L29/417 ; H01L27/11519 ; H01L27/11521 ; H01L21/28 ; H01L29/423

Abstract:
A nonvolatile memory device includes a plurality of twin cells arrayed on a substrate. Each of the plurality of twin cells includes a drain mesa protruding from a surface of a substrate. A first source and a second source are disposed in the substrate and spaced apart from the drain mesa. A first floating gate overlaps with a first sidewall surface of the drain mesa and extends onto the first source, and a second floating gate overlaps with a second sidewall surface of the drain mesa and extends onto the second source. Related methods are also provided.
Public/Granted literature
- US20160197153A1 NONVOLATILE MEMORY DEVICES HAVING SINGLE-LAYERED FLOATING GATES Public/Granted day:2016-07-07
Information query
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