Invention Grant
- Patent Title: Memory system
-
Application No.: US14636376Application Date: 2015-03-03
-
Publication No.: US09639291B2Publication Date: 2017-05-02
- Inventor: Hajime Matsumoto
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: G11C5/14
- IPC: G11C5/14 ; G06F3/06

Abstract:
According to one embodiment, there is provided a memory system including a non-volatile memory, a controller, a first interface circuit, a first signal line, and a second signal line. The controller is configured to control the non-volatile memory. The first interface circuit is configured to perform level conversion between a first power source level and a second power source level which is lower than the first power source level. The second power source level is used as a driving voltage of the controller. The first signal line is configured to connect to the first interface circuit. The second signal line is configured to connect the first interface circuit and a signal terminal of the controller. A potential of the second signal line is able to be pulled up to the second power source level.
Public/Granted literature
- US20160070502A1 MEMORY SYSTEM Public/Granted day:2016-03-10
Information query