Invention Grant
- Patent Title: Scalable methods for analyzing formalized requirements and localizing errors
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Application No.: US14742028Application Date: 2015-06-17
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Publication No.: US09639450B2Publication Date: 2017-05-02
- Inventor: Panagiotis Manolios
- Applicant: General Electric Company
- Applicant Address: US NY Niskayuna
- Assignee: General Electric Company
- Current Assignee: General Electric Company
- Current Assignee Address: US NY Niskayuna
- Agent Nitin N. Joshi
- Main IPC: G06F9/44
- IPC: G06F9/44 ; G06F11/36 ; G06F17/50

Abstract:
According to some embodiments, a system and method are provided for analyzing formal system requirements for software and hardware components in a software and hardware component specification model comprising receiving at least one requirement defined using a formal notation; determining if each of the requirements is self-conflicting via execution of a self-conflicting module; determining if two or more requirements conflict with each other via execution of a set-conflicting module after execution of the self-conflicting module; identifying each requirement involved in a conflict and how the one or more requirements conflicts via execution of an error localization module; receiving an updated requirement; repetitively analyzing each updated requirement with the self-conflicting module and the set-conflicting module; and generating an indication that requirements analysis is complete for the one or more requirements and the one or more requirements is validated for use in software design. Numerous other aspects are provided.
Public/Granted literature
- US20160371167A1 SCALABLE METHODS FOR ANALYZING FORMALIZED REQUIREMENTS AND LOCALIZING ERRORS Public/Granted day:2016-12-22
Information query