Invention Grant
- Patent Title: Method for checking a hardware-configurable logic circuit for faults
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Application No.: US14562124Application Date: 2014-12-05
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Publication No.: US09639653B2Publication Date: 2017-05-02
- Inventor: Michael Frischke
- Applicant: Robert Bosch GmbH
- Applicant Address: DE Stuttgart
- Assignee: ROBERT BOSCH GMBH
- Current Assignee: ROBERT BOSCH GMBH
- Current Assignee Address: DE Stuttgart
- Agent Gerard Messina
- Priority: DE102013225131 20131206
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F11/00 ; G01R31/3185 ; G11C29/04

Abstract:
A method is described for checking a hardware-configurable logic circuit including circuit areas and including a configuration memory having different subareas for faults, a respective configuration of hardware elements of one of the circuit areas being defined by configuration data stored in an associated subarea of the configuration memory, and when at least one checking requirement in regard to an output signal which is provided by the hardware-configurable logic circuit is met, a fault check of the configuration data being carried out only in those subareas of the configuration memory of the hardware-configurable logic circuit which are involved in generating the output signal.
Public/Granted literature
- US20150161323A1 METHOD FOR CHECKING A HARDWARE-CONFIGURABLE LOGIC CIRCUIT FOR FAULTS Public/Granted day:2015-06-11
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