Invention Grant
- Patent Title: Gate electrode material residual removal process
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Application No.: US15000273Application Date: 2016-01-19
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Publication No.: US09640385B2Publication Date: 2017-05-02
- Inventor: Bhargav Citla , Chentsau Ying , Srinivas D. Nemani
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson + Sheridan, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/28 ; H01L21/3213

Abstract:
The present disclosure provides methods for removing gate electrode residuals from a gate structure after a gate electrode patterning process. In one example, a method for forming high aspect ratio features in a gate electrode layer in a gate structure includes performing an surface treatment process on gate electrode residuals remaining on a gate structure disposed on a substrate, selectively forming a treated residual in the gate structure on the substrate with some untreated regions nearby in the gate structure, and performing a remote plasma residual removal process to remove the treated residual from the substrate.
Public/Granted literature
- US20160240385A1 GATE ELECTRODE MATERIAL RESIDUAL REMOVAL PROCESS Public/Granted day:2016-08-18
Information query
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