A low electric field source erasable non-volatile memory unit includes a substrate having a source diffusion region and a drain diffusion region. The source diffusion region includes a heavily-doped region and a lightly-doped region extending. A first dielectric layer and a tunnel dielectric layer are formed on the substrate. The tunnel dielectric layer includes a lower face contiguous to or partially overlapped with the lightly-doped region of the source diffusion region. A select gate and a floating gate are respectively formed on the first dielectric layer and the tunnel dielectric layer. The floating gate includes a source side edge contiguous to or partially overlapped with the lightly-doped region and misaligned from the heavily-doped region by a distance. A second dielectric layer and a control gate are formed on the floating gate. The control gate and the floating gate are insulating to each other by the second dielectric layer.