Invention Grant
- Patent Title: Method for manufacturing a transistor device comprising a germanium channel material on a silicon based substrate, and associated transistor device
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Application No.: US14934111Application Date: 2015-11-05
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Publication No.: US09640411B2Publication Date: 2017-05-02
- Inventor: Jianwu Sun , Roger Loo
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Agency: McDonnell Boehnen Hulbert & Berghoff LLP
- Priority: EP14191938 20141105
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/3205 ; H01L21/311 ; H01L29/161 ; H01L21/02 ; H01L29/66 ; H01L29/78 ; H01L29/10

Abstract:
Method for manufacturing a transistor device comprising a germanium channel material on a silicon based substrate, the method comprising providing a shallow trench isolation (STI) substrate comprising a silicon protrusion embedded in STI dielectric structures, and partially recessing the silicon protrusion in order to provide a trench in between adjacent STI structures, and to provide a V-shaped groove at an upper surface of the recessed protrusion. The method also includes growing a Si1-xGex SRB layer in the trenches, and growing a germanium based channel layer on the Si1-xGex SRB layer. In this example, the Si1-xGex SRB layer comprises a germanium content x that is within the range of 20% to 99%, and the SRB layer has a thickness less than 400 nm. The present disclosure also relates to an associated transistor device.
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