Invention Grant
- Patent Title: Chip packaging structure and manufacturing method thereof
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Application No.: US15065992Application Date: 2016-03-10
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Publication No.: US09640475B1Publication Date: 2017-05-02
- Inventor: You-Wei Lin , Zhi-Zhong Zhuang , Chih-An Yang
- Applicant: MStar Semiconductor, Inc.
- Applicant Address: TW Hsinchu Hsien
- Assignee: MStar Semiconductor, Inc.
- Current Assignee: MStar Semiconductor, Inc.
- Current Assignee Address: TW Hsinchu Hsien
- Agency: Edell, Shapiro & Finnan, LLC
- Priority: TW105100349A 20160107
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L23/498 ; H01L23/00 ; H01L23/31 ; H01L21/56
Abstract:
A chip packaging structure includes a chip, a passive component, and at least two metal lines. In the chip, first bonding pads, second bonding pads and connecting pads are disposed above an integrated circuit, and the second bonding pads and the connecting pads are separated from the integrated circuit. The second bonding pads are electrically connected to the corresponding connecting pads, respectively. The passive component is disposed on the chip, and includes two electrodes that are respectively electrically connected to and adhered to one of the corresponding connecting pad. The metal lines are disposed on the chip, and have one end thereof respectively connected to the second bonding pads, and the other end respectively connected to the first bonding pads.
Information query
IPC分类:
