Invention Grant
- Patent Title: Driving circuit and pin output order arranging method
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Application No.: US15218823Application Date: 2016-07-25
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Publication No.: US09640476B2Publication Date: 2017-05-02
- Inventor: Shin-Tai Lo , Cheng-Nan Lin , Shao-Ping Hung
- Applicant: Raydium Semiconductor Corporation
- Applicant Address: TW Hsinchu County
- Assignee: Raydlum Semiconductor Corporation
- Current Assignee: Raydlum Semiconductor Corporation
- Current Assignee Address: TW Hsinchu County
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L23/50 ; H01L27/02

Abstract:
A driving circuit and a pin output order arranging method are disclosed. The driving circuit includes (M*N) pins and an arranging module. A first pin˜an N-th pin of the (M*N) pins, a (N+1)-th pin˜an 2N-th pin of the (M*N) pins, . . . , a [(M−1)*N+1]-th pin˜a (M*N)-th pin of the (M*N) pins are arranged along a first direction in a specific distance spaced to form a first row of pins˜an M-th row of pins. The first row of pins˜the M-th row of pins are staggered along a second direction in a staggering way or an aligning way. M and N are integers larger than 1. The arranging module correspondingly arranges the pin output order of the (M*N) pins according to different application modes of the driving circuit.
Public/Granted literature
- US20170077024A1 DRIVING CIRCUIT AND PIN OUTPUT ORDER ARRANGING METHOD Public/Granted day:2017-03-16
Information query
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