Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US15218004Application Date: 2016-07-23
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Publication No.: US09640613B2Publication Date: 2017-05-02
- Inventor: Junichi Takizawa
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2015-168539 20150828
- Main IPC: H01L29/04
- IPC: H01L29/04 ; H01L29/06 ; H01L29/78 ; H01L29/10 ; H01L29/66 ; H01L21/265 ; H01L21/266

Abstract:
Improvements are achieved in the performance and reliability of a semiconductor device. In a trench in an n-type semiconductor substrate, a gate electrode for a trench-gate field effect transistor is formed via a gate insulating film. A p-type semiconductor region for channel formation is formed so as to be adjacent to the trench. Over the p-type semiconductor region, a source n+-type semiconductor region is formed so as to be adjacent to the trench. In the semiconductor substrate, a first p-type column is formed under the p-type semiconductor region. Under the first p-type column, a second p-type column is formed. The first p-type column is internally included in the second p-type column in plan view. The two-dimensional size of the second p-type column is larger than the two-dimensional size of the first p-type column.
Public/Granted literature
- US20170062556A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2017-03-02
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