Invention Grant
- Patent Title: Integrated device with raised locos insulation regions and process for manufacturing such device
-
Application No.: US14509229Application Date: 2014-10-08
-
Publication No.: US09640614B2Publication Date: 2017-05-02
- Inventor: Alessandro Causio , Paolo Colpani , Simone Dario Mariani
- Applicant: STMicroelectronics S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee Address: IT Agrate Brianza
- Agency: Gardere Wynne Sewell LLP
- Priority: ITTO2009A0737 20090929
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/51 ; H01L29/06 ; H01L21/8238 ; H01L27/092 ; H01L29/423 ; H01L29/66
Abstract:
An integrated device includes a semiconductor body including an STI insulating structure that laterally delimits first active areas and at least one second active area in a low-voltage region and in a power region of the semiconductor body, respectively. Low-voltage CMOS components are housed in the first active areas. A power component, formed in the second active area, includes a source region, a body region, a drain-contact region, and at least one LOCOS insulation region. The insulating region is arranged between the body region and the drain-contact region and has a prominent portion that emerges from a surface of the semiconductor body, and an embedded portion inside it. The prominent portion of the LOCOS insulation region has a volume greater than that of the embedded portion.
Public/Granted literature
- US20150054088A1 INTEGRATED DEVICE WITH RAISED LOCOS INSULATION REGIONS AND PROCESS FOR MANUFACTURING SUCH DEVICE Public/Granted day:2015-02-26
Information query
IPC分类:
