Invention Grant
- Patent Title: Image processor
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Application No.: US14919979Application Date: 2015-10-22
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Publication No.: US09641867B2Publication Date: 2017-05-02
- Inventor: Naotsugu Yamamura , Akira Okamoto , Nobuyuki Takasu
- Applicant: MegaChips Corporation
- Applicant Address: JP Osaka-shi
- Assignee: MegaChips Corporation
- Current Assignee: MegaChips Corporation
- Current Assignee Address: JP Osaka-shi
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2014-217812 20141024; JP2014-217813 20141024
- Main IPC: G06K9/36
- IPC: G06K9/36 ; G06K9/46 ; H04N19/65 ; H04N19/44 ; H04N19/105 ; H04N19/172 ; H04N19/164

Abstract:
In an earliest vertical synchronization period after sending an encoded image data is restarted, a first reference image determination circuit determines to employ a local decoded image generated in a vertical synchronization period immediately preceding a vertical synchronization period in which an error occurs among multiple local decoded images stored in a first DRAM as a reference image. In an earliest vertical synchronization period after a decoding circuit is reset, a second reference image determination circuit determines to employ a decoded image generated in the vertical synchronization period immediately preceding the vertical synchronization period in which the error occurs among multiple decoded images stored in a second DRAM as a reference image.
Public/Granted literature
- US20160119648A1 IMAGE PROCESSOR Public/Granted day:2016-04-28
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